Title: A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures
- Title
- A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures
- Platform
- SpringerLink
- Status
- Current
- Publication Type
- Monograph
- Medium
- Empty
- Language
-
- First Author
- Dunn
- First Editor
- Empty
- Publisher Name
- Springer US
- Date First in Print
- 2003-01-01
- Date First Online
- 2003-01-01
- Access Start Date
- Empty
- Access End Date
- Empty
- Volume Number
- Empty
- Edition Statement
- 1
- Access Type
- Paid
- Note
- Empty
- Last Changed External
- Empty
- Date Created
- 2022-02-16 07:34:07
- Last Updated
- 2024-07-09 20:03:02
- UUID
- c1e1d0bc-6273-4fcd-b745-9c3ad9baf058
Identifier Namespace Name | Identifier Namespace Value | Identifier |
---|---|---|
eISBN | eisbn | 978-1-4419-8650-4 |
ISBN | isbn | 978-0-306-47743-0 |
Title_ID | title_id | 10.1007/978-1-4419-8650-4 |
- Subject Area
- Empty
Dewey Decimal Classification |
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- Series
- Empty
- Parent publication title ID
- 6448
- Superseding publication title ID
- Empty
- Preceding publication title ID
- Empty
- Open Access
- Empty
Price Type | Value | Currency |
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